Safety mechanisms for the car's central computer

Client & context

Continental developed a cross-domain High-Performance Computing platform with gateway capabilities for a German OEM — the class of ECU that consolidates functions which used to live on separate controllers into one central compute node.

The problem

The platform had to reach ASIL B(D) across multiple microcontrollers without compromising the performance that justifies an HPC in the first place. Safety mechanisms, freedom from interference, and end-to-end communication protection all had to be argued — and proven by FMEDA — at both MCU and system level.

What I did

• Drove the functional safety of the software development for the ASIL B(D) HPC + gateway platform, ensuring compliance of safety concepts and requirements.
• Specified and verified safety mechanisms on Aurix TC39x and Renesas RL78 microcontrollers — built-in self-tests, Watchdog Manager, and deadline monitoring.
• Achieved SPFM/LFM targets verified by FMEDA at MCU and system level.
• Configured and validated CAN E2E protection and a TLF35584 safety SBC to close system-level safety gaps.
• Reviewed compiler settings to align build integrity with safety requirements, conducted impact analyses, raised problem reports, and compiled safety-case reports.